Desain PLL Rendah Daya Untuk Sintesis Frekuensi Pita ISM 2.4 GHz Menggunakan Teknologi CMOS 130 nm

Assaify, Nahwan Faza (2025) Desain PLL Rendah Daya Untuk Sintesis Frekuensi Pita ISM 2.4 GHz Menggunakan Teknologi CMOS 130 nm. Other thesis, Institut Teknologi Sepuluh Nopember.

Text 5022211087-Undergraduate_Thesis.pdf - Accepted Version Restricted to Repository staff only Download (2MB) | Request a copy

Abstract

Perkembangan teknologi perangkat seluler memicu kebutuhan untuk menekan konsumsi daya. Salah satu sektor perangkat elektronik dengan penggunaan yang masif adalah Bluetooth Low Energy (BLE) yang bekerja pada pita frekuensi ISM 2.4 GHz. Perangkat BLE memiliki ekspektasi konsumsi daya rendah di bawah 100 mW, sehingga dibutuhkan tranceiver dengan daya rendah. Phase locked loop (PLL) merupakan bagian dari sistem tranceiver yang dapat dioptimasi. Dalam lingkungan desain rangkaian terintegrasi open source, desain PLL masih terhambat dengan tidak adanya perangkat induktor spiral dalam PDK yang disediakan oleh SkyWater. Karena itu, voltage controlled oscillator (VCO) berbasis ring oscillator lebih dipilih untuk menghindari penggunaan induktor. PLL rendah daya berbasis ring oscillator dapat dicapai dengan arsitektur PLL Tipe-I. Namun, arsitektur tersebut memiliki kompensasi daya terhadap phase noise yang tinggi. Untuk mengatasi masalah tersebut, digunakan master-slave sampling filter (MSSF) sebagai pengganti loop filter pada PLL Tipe-I konvensional. Penelitian ini berfokus pada desain PLL pita frekuensi 2.4 GHz berdaya rendah menggunakan proses SkyWater 130 nm. Struktur PLL yang digunakan adalah PLL tipe I dengan menerapkan rangkaian MSSF dan osilator ring. Untuk kebutuhan simulasi sintesis frekuensi, digunakan pembagi frekuensi dengan topologi integer-n demi kesederhanaan desain. Hasil simulasi menunjukkan phase noise sebesar -167,88 dBc/Hz pada offset frekuensi 1 MHz dan spur referensi sebesar -53,75 dBc. Arsitektur PLL keseluruhan memiliki dimensi aktif sebesar 358,50 µm × 138,0 µm dengan konsumsi daya rata-rata sebesar 11,63 mW.
================================================================================================================================
The development of mobile device technology triggers the need to reduce power consumption. One of the electronic device sectors with massive application is Bluetooth Low Energy (BLE) which works in the 2.4 GHz ISM frequency band. BLE devices have an expectation of low power consumption below 100 mW, thus a low-power tranceiver is required. Phase locked loop (PLL) is a part of the tranceiver system that can be optimized. In the open source integrated circuit design environment, PLL design is still hampered by the absence of spiral inductor devices in the PDK provided by SkyWater. Therefore, ring oscillator-based voltage controlled oscillator (VCO) is preferred to avoid the use of inductors. Ring oscillator-based low-power PLLs can be achieved with Type-I PLL architectures. However, the architecture has a high power consumption to phase noise compensation. To overcome this problem, a master-slave sampling filter (MSSF) is used instead of the sampling filter in conventional Type-I PLLs. This research focuses on the design of a low-power 2.4 GHz frequency band PLL using the 130 nm SkyWater process. The PLL structure used is Type-I PLL by applying the MSSF circuit and a ring oscillator. For frequency synthesis simulation needs, a frequency divider with integer-n topology is used for design simplicity. The simulation results show -167,88 dBc/Hz phase noise at 1 MHz frequency offset and -53,75 dBc reference spur. The complete PLL architecture measures 358,50 µm × 138,0 µm active dimension while consuming 11,63 mW of average power.

Item Type:	Thesis (Other)
Uncontrolled Keywords:	PLL, Low Power, MSSF, Frequency Synthesis, Open-Source, PLL, Rendah Daya, MSSF, Sintesis Frekuensi, Open Source
Subjects:	T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK6564 Radio transmitter-receivers T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7872.F5 Filters (Electric) T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK9956 Radio. Wireless telephone
Divisions:	Faculty of Intelligent Electrical and Informatics Technology (ELECTICS) > Electrical Engineering > 20201-(S1) Undergraduate Thesis
Depositing User:	Nahwan Faza Assaify
Date Deposited:	25 Jul 2025 08:14
Last Modified:	25 Jul 2025 08:14
URI:	http://repository.its.ac.id/id/eprint/121558

Actions (login required)

View Item