Hardianto, Hardianto (2025) Desain Dan Implementasi Pembangkit Sinyal Multi-Gelombang Berbasis Direct Digital Synthesizer Pada FPGA Untuk Meningkatkan Performa Sistem Radar Continuous Wave. Masters thesis, Institut Teknologi Sepuluh Nopember.
![[thumbnail of 6022231054-Master_Thesis.pdf]](http://repository.its.ac.id/style/images/fileicons/text.png) |
Text
6022231054-Master_Thesis.pdf - Accepted Version Restricted to Repository staff only Download (7MB) | Request a copy |
Abstract
Perkembangan platform radar Continuous Wave (CW) terus mengalami peningkatan, dari implementasi sederhana hingga sistem yang lebih canggih seiring dengan kemajuan teknologi digital. Radar CW dikenal efektif untuk mendeteksi gerakan berdasarkan efek Doppler, namun kebutuhan aplikasi terkini semakin mengarah pada radar Frequency Modulated Continuous Wave (FMCW) yang mampu mengukur jarak dan kecepatan secara simultan melalui modulasi frekuensi kontinyu. Arsitektur FPGA-DDS menawarkan potensi signifikan untuk mendukung evolusi dari radar CW menuju implementasi FMCW melalui kemampuan pembangkitan sinyal chirp dengan kontrol fase dan frekuensi yang presisi, membuka peluang pengembangan sistem radar yang lebih adaptif. Penelitian ini mengimplementasikan pembangkit sinyal FPGA-DDS multi-gelombang dengan optimasi sinyal terima. Sistem menggunakan FPGA DE10-Lite dengan algoritma DDS 32-bit, DAC AD5541 16-bit, dan rangkaian pengkondisi sinyal terintegrasi untuk menghasilkan lima jenis gelombang (DC, kotak, gergaji, segitiga, sinusoidal) pada rentang 5 Hz-20 kHz dengan output 0-5V sebagai sinyal kontrol VCO untuk modul transceiver K-MC1. Pada sisi penerima, rangkaian differential amplifier dan filter low-pass diimplementasikan untuk meningkatkan sensitivitas deteksi sinyal I/Q dari radar K-MC1, mengurangi offset DC dan meredam noise. Evaluasi komprehensif pada pengujian sistem meliputi 13 parameter kualitas sinyal dengan hasil menunjukkan superioritas FPGA-DDS: peningkatan akurasi amplitudo hingga 98.94%, stabilitas frekuensi 99.85%, SNR 7.35% lebih tinggi, dengan trade-off THD 2.73%. Validasi sistem radar terintegrasi menggunakan K-MC1 dan pendulum sebagai target referensi (frekuensi teoritis 1.140 Hz) mengonfirmasi kemampuan deteksi yang handal dengan spektral yang lebih bersih, baseline noise yang lebih rendah, dan sensitivitas deteksi yang ditingkatkan melalui optimasi gain sinyal terima.
==================================================================================================================================
Continuous Wave (CW) radar platforms continue to experience significant advancement, evolving from simple implementations to more sophisticated systems in line with digital technology progress. CW radar is recognized as effective for motion detection based on Doppler effect, however current application requirements increasingly tend toward Frequency Modulated Continuous Wave (FMCW) radar capable of simultaneously measuring range and velocity through continuous frequency modulation. FPGA-DDS architecture offers significant potential to support evolution from CW radar toward FMCW implementation through precise chirp signal generation capabilities with accurate phase and frequency control, opening opportunities for more adaptive radar system development. This research implements a multi-waveform FPGA-DDS signal generator with receive signal optimization. The system utilizes FPGA DE10-Lite with 32-bit DDS algorithm, 16-bit DAC AD5541, and integrated signal conditioning circuits to generate five waveform types (DC, square, sawtooth, triangle, sinusoidal) in the 5 Hz-20 kHz range with 0-5V output as VCO control signal for K-MC1 transceiver module. On the receiver side, differential amplifier and low-pass filter circuits are implemented to enhance I/Q signal detection sensitivity from K-MC1 radar, reducing DC offset and suppressing noise. Comprehensive evaluation of system testing covers 13 signal quality parameters with results demonstrating FPGA-DDS superiority: amplitude accuracy improvement up to 98.94%, frequency stability 99.85%, SNR 7.35% higher, with THD trade-off of 2.73%. Integrated radar system validation using K-MC1 and pendulum as reference target (theoretical frequency 1.140 Hz) confirms reliable detection capability with cleaner spectral characteristics, lower baseline noise, and enhanced detection sensitivity through receive signal gain optimization.
| Item Type: | Thesis (Masters) |
|---|---|
| Uncontrolled Keywords: | pembangkit sinyal, FPGA-DDS, radar CW, kontrol VCO, optimasi kualitas sinyal signal generator, FPGA-DDS, CW radar, VCO control, signal quality optimization |
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7895.G36 Field programmable gate arrays--Design and construction. |
| Divisions: | Faculty of Intelligent Electrical and Informatics Technology (ELECTICS) > Electrical Engineering > 20101-(S2) Master Thesis |
| Depositing User: | Hardianto Hardianto |
| Date Deposited: | 28 Jul 2025 07:40 |
| Last Modified: | 28 Jul 2025 07:40 |
| URI: | http://repository.its.ac.id/id/eprint/122177 |
Actions (login required)
 |
View Item |