Perbaikan Nilai Critical Clearing Time dengan kombinasi Superconducting Fault Current Limiter dan Super Capacitor Energy Storage dengan Menggunakan Metode Critical Trajectory

Adha, Hanif Rifai (2023) Perbaikan Nilai Critical Clearing Time dengan kombinasi Superconducting Fault Current Limiter dan Super Capacitor Energy Storage dengan Menggunakan Metode Critical Trajectory. Masters thesis, Institut Teknologi Sepuluh Nopember.

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Abstract

Penelitian mengenai analisis kestabilan transien memiliki peran yang sangat penting dalam menjaga reliabilitas dan kontinuitas sistem, terutama saat menghadapi gangguan besar seperti hubung singkat. Ketika sistem proteksi harus bertindak dengan cepat untuk mengisolasi gangguan hubung singkat, masalah kestabilan transien menjadi tantangan yang sangat kompleks. Jika gangguan tidak diatasi tepat waktu dan melebihi Critical Clearing Time (CCT), dapat mengakibatkan ketidakstabilan sistem. Karena itu, CCT menjadi faktor kunci untuk menentukan waktu maksimum yang diperlukan oleh sistem proteksi untuk mengisolasi gangguan dan menjaga stabilitas sistem. Hingga saat ini, telah ada beberapa metode alternatif yang digunakan untuk meningkatkan stabilitas sistem dengan meningkatkan nilai CCT. Salah satunya adalah menggunakan kombinasi Superconducting Fault Current Limiter (SFCL) dan Super Capacitor Energy Storage (SCES). SFCL memiliki karakteristik di mana impedansinya tinggi saat terjadi gangguan dan rendah saat dalam kondisi normal selama periode transisi, yang dapat digunakan untuk meningkatkan nilai CCT sistem. Sementara itu, SCES memiliki kemampuan untuk menyerap daya listrik sistem dengan kecepatan tinggi, berfungsi sebagai dummy load yang dapat menyerap daya aktif sejenak saat terjadi gangguan sesuai dengan kapasitas yang dimiliki untuk meningkatkan nilai CCT sistem. Dalam penelitian ini, penerapan kombinasi SFCL dan SCES pada sistem diuji menggunakan metode lintasan kritis karena memiliki iterasi yang sedikit dan komputasi yang cepat. Hasil yang diperoleh akan divalidasi kembali menggunakan metode Time Domain Simulation (TDS). Pengujian akan dilakukan untuk mengevaluasi efektivitas kombinasi SFCL dan SCES dalam meningkatkan nilai CCT pada tiga sistem, yaitu sistem Anderson and Fouad 3-machine 9-bus, IEEE 6-machine 30-bus, dan IEEE 7-machines 57-bus. Hasil penelitian menunjukkan bahwa penerapan kombinasi SFCL dan SCES mampu meningkatkan stabilitas sistem seiring dengan peningkatan nilai CCT. Kenaikan nilai CCT yang tercapai bergantung pada lokasi dan kapasitas kombinasi yang dipasang dalam sistem. Peningkatan nilai CCT yang paling signifikan terjadi ketika SFCL dipasang di dekat generator dan SCES dipasang pada generator yang berada dalam kondisi kritis.
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Research on transient stability analysis plays a crucial role in maintaining the reliability and continuity of a system, particularly when facing major disturbances such as short circuits. When the protection system needs to act swiftly to isolate a short circuit disturbance, transient stability issues become highly complex challenges. If the disturbance is not promptly addressed and exceeds the Critical Clearing Time (CCT), it can result in system instability. Hence, CCT is a key factor in determining the maximum time required by the protection system to isolate the disturbance and maintain system stability. To date, several alternative methods have been employed to enhance system stability by increasing the value of the Critical Clearing Time (CCT). One of these methods involves the combination of Superconducting Fault Current Limiter (SFCL) and Super Capacitor Energy Storage (SCES). SFCL exhibits characteristics wherein its impedance is high during disturbances and low during normal conditions in the transient period, which can be utilized to improve the CCT value of the system. On the other hand, SCES has the capability to rapidly absorb electrical power from the system, acting as a dummy load that momentarily absorbs active power during disturbances according to its capacity, thus increasing the CCT value of the system. In this study, the implementation of the SFCL and SCES combination in the system is tested using the Critical Path Method due to its low iteration and fast computation. The obtained results will be further validated using the Time Domain Simulation (TDS) method. Testing will be conducted to evaluate the effectiveness of the SFCL and SCES combination in enhancing the CCT value in three systems: the Anderson and Fouad 3-machine 9-bus system, the IEEE 6-machine 30-bus system, and the IEEE 7-machines 57-bus system. The research results demonstrate that the application of the SFCL and SCES combination can improve the system stability in correlation with an increase in the CCT value. The achieved increase in the CCT value depends on the location and capacity of the installed combination in the system. The most significant improvement in the CCT value occurs when the SFCL is installed near the generator and the SCES is installed on the generator operating in critical conditions.

Item Type: Thesis (Masters)
Uncontrolled Keywords: critical clearing time, kestabilan transien, super capacitor energy storage, superconducting fault current limiter, time domain simulation, critical trajectory, kestabilan transien, super capacitor energy storage, superconducting fault current limiter
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK1007 Electric power systems control
T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK1010 Electric power system stability. Electric filters, Passive.
T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK3226 Transients (Electricity). Electric power systems. Harmonics (Electric waves).
Divisions: Faculty of Intelligent Electrical and Informatics Technology (ELECTICS) > Electrical Engineering > 20101-(S2) Master Thesis
Depositing User: HANIF RIFAI ADHA
Date Deposited: 31 Jul 2023 07:52
Last Modified: 31 Jul 2023 07:52
URI: http://repository.its.ac.id/id/eprint/99996

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