Desain Sinkronisasi Dual Static Inverter Menggunakan Phase Locked Loop Dan Vector Control Pada Kereta Berpenggerak Listrik

Rifat, Shabrina Thifaal (2025) Desain Sinkronisasi Dual Static Inverter Menggunakan Phase Locked Loop Dan Vector Control Pada Kereta Berpenggerak Listrik. Other thesis, Institut Teknologi Sepuluh Nopember.

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Abstract

Sistem kelistrikan kereta berpenggerak listrik di Indonesia masih menggunakan expand box sebagai sakelar darurat. Penggunaan alat ini membuat sistem menjadi lebih rumit dan membutuhkan banyak kabel. Penelitian ini mengusulkan sinkronisasi dua static inverter sebagai solusi, dengan metode Phase Locked Loop (PLL) dan vector control. Sistem dirancang dalam konfigurasi master–slave. Transformasi Clarke dan Park digunakan untuk mengubah sinyal tiga fasa menjadi bentuk dq. PLL berfungsi mengunci fase tegangan inverter master, sedangkan vector control mengatur pembagian daya melalui kontroler PI. Hasil simulasi menunjukkan sinkronisasi berjalan stabil. Error di bawah 1%, dan waktu sinkronisasi kurang dari 2 detik. Tegangan output memiliki kualitas baik dengan THD di bawah 5%. Algoritma pembagian beban juga bekerja baik, dengan error menurun dari 0.072% menjadi 0.025% saat beban meningkat. Dengan hasil ini, sistem sinkronisasi dual inverter dinilai cocok untuk menggantikan sistem konvensional dan meningkatkan efisiensi pada beban auxiliary kereta.
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The electric power system of electric trains in Indonesia still uses an expand box as an emergency switch. This component increases system complexity and requires extensive cabling. This study proposes a dual static inverter synchronization system as a solution, using Phase Locked Loop (PLL) and vector control methods. The system is designed in a master–slave configuration. Clarke and Park transformations are used to convert three-phase signals into dq components. The PLL locks the phase of the master inverter voltage, while vector control regulates power sharing through a PI controller. Simulation results show stable synchronization with errors below 1% and synchronization time under 2 seconds. The output voltage maintains good quality, with THD below 5%. The load sharing algorithm also performs well, with error decreasing from 0.072% to 0.025% as the load increases. These results indicate that the proposed dual inverter synchronization system is a suitable alternative to conventional systems and can improve efficiency in auxiliary train power systems.

Item Type:	Thesis (Other)
Uncontrolled Keywords:	Static Inverter, Sinkronisasi Inverter, Phase Locked Loop, Vector Control. Static Inverter, Inverter Synchronization, Phase Locked Loop, Vector Control.
Subjects:	T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK1007 Electric power systems control
Divisions:	Faculty of Intelligent Electrical and Informatics Technology (ELECTICS) > Electrical Engineering > 20201-(S1) Undergraduate Thesis
Depositing User:	Shabrina Thifaal Rifat
Date Deposited:	25 Jul 2025 06:59
Last Modified:	25 Jul 2025 06:59
URI:	http://repository.its.ac.id/id/eprint/121537

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