Suhairi, M (2019) Pengurangan Kompleksitas Komputasi Pada Multiview HEVC Berbasis Perangkat FPGA. Masters thesis, Institut Teknologi Sepuluh Nopember.
Preview |
Text
07111650030002-Master_Thesis.pdf - Accepted Version Download (3MB) | Preview |
Abstract
Dengan meningkatnya kualitas dan resolusi konten video, terutama video 3D, kompleksitas komputasi dalam pemrosesannya juga meningkat secara signifikan. Salah satu standar video yang populer, HEVC memiliki ekstensi yang dinamakan Multiview HEVC (MV-HEVC) dan 3D-HEVC dengan jumlah data dan resolusi yang tinggi, mengakibatkan adanya peningkatan kompleksitas komputasi. Penelitian ini bertujuan mengurangi kompleksitas komputasi dari video MV-HEVC dengan menerapkan mode decision berupa ECU, CFM, ESD, dan deblocking filter yang diujicobakan pada platform PC berbasis Linux dan platform Xilinx All Programmable SoC. Dari hasil eksperimen didapatkan pengurangan kompleksitas komputasi yang dilihat dari perbandingan dari waktu encoding. Platform Xilinx All Programmable SoC mampu memperoleh waktu encoding yang lebih cepat 35,85% daripada PC berbasis Linux. Selanjutnya untuk kualitas video yang dihasilkan antara kedua platform tersebut hampir sama dilihat dari nilai bitrate dan PSNR.
===========================================================================
Due to the increasing quality and resolution of videocontent, especially 3D video, the computational complexity forits processing also significantly increases. One of the popularformat, HEVC has extensions called Multiview HEVC (MV-HEVC) and 3D-HEVC with high amounts of data and highresolution that resulting in increased computational complexity.This study aims to reduce the computational complexity of MVHEVC videos by implementing mode decision such as ECU,CFM, ESD, and deblocking filterswhich are tested on Linuxbased PC platforms and the Xilinx All Programmable SoCplatform. From the experimental results obtained the reductionin computational complexity can be seen from the comparisonofencoding time, the Xilinx All Programmable SoC platform isable to obtain encoding times that are faster than Linux-basedPCs. For the quality of the video produced between the two theplatform is not significant from the bitrate and PSNR values.
| Item Type: | Thesis (Masters) |
|---|---|
| Additional Information: | RTE 621.388 33 Suh p |
| Uncontrolled Keywords: | MV-HEVC; H.265; Xilinx; Zynq |
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK5102.9 Signal processing. T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK5101 Telecommunication |
| Divisions: | Faculty of Electrical Technology > Electrical Engineering > 20101-(S2) Master Thesis |
| Depositing User: | M Suhairi |
| Date Deposited: | 24 May 2021 07:09 |
| Last Modified: | 06 Aug 2021 05:32 |
| URI: | http://repository.its.ac.id/id/eprint/60160 |
Actions (login required)
 |
View Item |